DocumentCode
3552422
Title
A notation for describing multiple views of VLSI circuits
Author
Baer, Jean-Loup ; Liem, Meei-Chiueh ; Mcmurchie, Larry ; Nottrott, Rudolf ; Snyder, Lawrence ; Winder, Wayne
Author_Institution
Dept. of Comput. Sci., Washington Univ., Seattle, WA, USA
fYear
1988
fDate
12-15 June 1988
Firstpage
102
Lastpage
107
Abstract
A declaration hierarchical notation is introduced that allows the parametric representation of entire families of VLSI circuits. Layout, schematic diagrams and network structure are all accommodated by the notation in a way that emphasizes common elements. The notation is the basic of a structured environment for developing design generators as well as capturing design expertise.<>
Keywords
VLSI; specification languages; capturing design expertise; declaration hierarchical notation; developing design generators; emphasizes common elements; entire families of VLSI circuits; layout notation; network structure; parametric representation; schematic diagrams; structured environment; Application specific integrated circuits; Circuit simulation; Circuit synthesis; Computer science; Contracts; Databases; Design automation; Laboratories; Programmable logic arrays; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 1988. Proceedings., 25th ACM/IEEE
Conference_Location
Anaheim, CA, USA
ISSN
0738-100X
Print_ISBN
0-8186-0864-1
Type
conf
DOI
10.1109/DAC.1988.14743
Filename
14743
Link To Document