Monolithic MOS complementary pairs

This paper describes the fabrication of stable, monolithic, enhancement-mode, N and P-channel MOS transistors (N-MOST\´s and P-MOST\´s). In recent years, stable, discrete N-MOST\´s and P-MOST\´s have been produced and marketed, but it has generally been found that the fabrication of the two devices on the same substrate led to incompatible processing steps. The major problems in pIocess compatibility have now been solved and stable complementary MOS pairs are being produced which show excellent potential for use in high speed, low power integrated logic circuits. Extensive evaluation of these monolithic complementary pairs has been performed. Device characteristics and reliability data are presented and a process monitoring method is described. Utilization of complementary pairs in integrated logic circuits is discussed and a comparison is made of circuits containing complementary, integrated MOST\´s as contrasted with those containing "single-polarity" MOST\´s. By proper processing techniques, it is possible to obtain a high component density without sacrificing the speed and power advantages of the pairs.