A silicon carbide FET by microelectronics technology

All diffused, planar FET\´s which show a power gain at 500°C have been fabricated from SiC by the development of microelectronics processes similar to silicon integrated circuits As many as 25 0.030" × 0.040" devices can be put on a single SiC platelet. The SiC platelet is aluminum diffused at 2300°K to a depth of about 1.3 mils to form the lower gate. The p-layer on the carbon face of the crystal is removed with high precision lapping-polishing jig. The planar structure of the upper gate region is formed by a unique self-masked diffusion Process which consists of the following steps: The polished carbon surface of the crystal is oxidized; a Window of an upper gate pattern is photoresist etched into SiO2using SiO2as a mask the pattern is etched into SiC by a precision chlorine etch; the upper gate junction is formed by aluminum diffusion to a depth of about 0.5 mil in two steps to obtain a channel thickness of 1 to 2µ, the unetched SiC serving as the diffusion mask; the SiC mask is lapped away to return the carbon surface to planarity and expose the source and drain regions. Ta-Au ohmic contacts are applied using photoresist and a special sputtering and alloying technique. The electrical characteristics of a silicon carbide FET are presented and discussed.