Transistor design for application in high speed complex bipolar arrays

This paper is directed toward the problem of power dissipation in very high speed complex biopolar parity generator array which is intended to have been developed which exhibit greater than 3 GHz fTat collector currents in the range of 0.5 to 1 mA. Such transistors have been incorporated into simple ECL microcircuit designs which have demonstrated average propagation delay times of 0.5 ns with power dissipation in the range of 10-15 mW for the complementary three input ECL gate.