Fabrication of planar silicon transistors without photoresist

Silicon integrated circuit fabrication technology depends upon the use of the surface oxide as a diffusion mask. Ordinarily the diffusion windows are opened by etching the oxide through holes in a photoresist mask. A new process has been developed which makes the photoresist unnecessary. The chemical etch rate of a thermally grown silicon dioxide layer can be increased typically ∼ 3 times by bombardment with energetic electrons (1-15 keV). No erosion of material is involved. When etched, the bombarded regions dissolve away first, leaving sufficient oxide over the unbombarded portion of the wafer to provide an adequate diffusion mask. Window geometry is controlled by steering or shaping the electron beam. Electron bombardment can also be used to delineate metallized regions for contacts. In this way, high quality planar transistor arrays have been fabricated entirely without the use of any photoresist steps.