Abstract :
In an effort to see how much improvement could be made in a silicon saturating-logic circuit with good noise immunity, using developmental technology, a six-input T2L switching circuit was designed, incorporating dielectric isolation and very small-area devices. A high concentration of gold mast be introduced into the base and collector areas to provide the low-lifetimes necessary for ultra-fast circuits. Since gold will not diffuse through the silicon dioxide dielectric isolation layer, it must be diffused through the openings in the top surface of the wafer into a relatively small volume of silicon. An overabundance of gold can compensate donor impurities in the collector region, resulting in very high resistivity. Thus, control of the amount of gold introduced into each island is highly critical, and was accomplished by separately limiting the amount of gold available to each different-sized island, and by careful control of the goldplating solution and gold diffusion temperature.
