DocumentCode :
3552806
Title :
An optimal packet switch architecture for ATM
Author :
Albertengo, G.
Author_Institution :
Dept. of Electron., Politecnico di Torino, Italy
fYear :
1991
fDate :
7-11 Apr 1991
Firstpage :
441
Abstract :
The architecture of a high speed packet switch for an ATM system is presented. The switch is based on input electronic modules, where the incoming packets are processed and buffered, and on an optical interconnection network, connecting the inputs to the outputs. During each slot each output can receive a single packet, and each input can transmit up to L packets. A reservation mechanism avoids collisions on the optical network, implementing a series of distributed queues. The switch performance was studied by simulation. The effect of the input switching capacity L on the performance is discussed
Keywords :
integrated optoelectronics; optical interconnections; packet switching; ATM system; VLSI; distributed queues; electro-optical technology; high speed packet switch; input electronic modules; input switching capacity; optical interconnection network; optical network; packet switch architecture; reservation mechanism; simulation; switch performance; Asynchronous transfer mode; Optical buffering; Optical devices; Optical fiber networks; Optical packet switching; Optical switches; Packet switching; Time division multiplexing; Very large scale integration; Wavelength division multiplexing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
INFOCOM '91. Proceedings. Tenth Annual Joint Conference of the IEEE Computer and Communications Societies. Networking in the 90s., IEEE
Conference_Location :
Bal Harbour, FL
Print_ISBN :
0-87942-694-2
Type :
conf
DOI :
10.1109/INFCOM.1991.147537
Filename :
147537
Link To Document :
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