Title :
A programmable hardware accelerator for compiled electrical simulation
Author_Institution :
Dept. of Electr. Eng., Toronto Univ., Ont., Canada
Abstract :
A high-performance hardware accelerator is described for electrical simulation, with a speedup of over 500 for a uniprocessor. The processor addresses a variety of problems ranging from timing simulation to circuit simulation. The accelerator combines special purpose units, such as a high-speed device evaluator, with a fully programmable general-purpose processor. The specialized processors offer extremely high speed for performance-critical parts of the simulation. The general-purpose processors are optimized for compiled electrical simulation, and use a very long instruction word (VLIW) architecture. The network solution is compiled into VLIW code. The author concentrates on those features of the machine that are designed for circuit simulation algorithms, such as SPICE. A simplified example is used to expose the hardware and software techniques used to attack the problem, and estimate the performance improvement due to each technique
Keywords :
VLSI; circuit CAD; digital simulation; general purpose computers; parallel processing; (VLIW); Awsim-3; SPICE; VLSI design; circuit simulation; circuit simulation algorithms; compiled electrical simulation; hardware technique; high-speed device evaluator; programmable general-purpose processor; programmable hardware accelerator; software techniques; timing simulation; vector processor; very long instruction word architecture; Acceleration; Algorithm design and analysis; Analytical models; Circuit simulation; Computational modeling; Hardware; Logic; SPICE; Timing; VLIW;
Conference_Titel :
Design Automation Conference, 1988. Proceedings., 25th ACM/IEEE
Conference_Location :
Anaheim, CA
Print_ISBN :
0-8186-0864-1
DOI :
10.1109/DAC.1988.14754
