VLSI implementation of routing tables: tries and CAMs

Author

Pei, Tong-Bi ; Zukowski, Charles

Author_Institution

Dept. of Electr. Eng., Columbia Univ., New York, NY, USA

fYear

1991

fDate

7-11 Apr 1991

Firstpage

515

Abstract

Routing tables for communication networks can be designed using many different approaches, including table lookup, content-addressable memory (CAM), hashing, and tries. The authors compare these approaches in the context of custom VLSI implementation. For tables with a small number of entries and a large address space, CAMs can be very cost effective. If only RAM is available, it is shown that tries, of which simple table lookup is a special case, provide a useful architecture. Also considered is a new variation, table partitioning, which constitutes a useful compromise between the conventional CAM and a trie

Keywords

VLSI; application specific integrated circuits; content-addressable storage; packet switching; CAM; communication networks; content-addressable memory; custom VLSI implementation; hashing; packet switching; routing tables; table lookup; table partitioning; tries; CADCAM; Cams; Communication networks; Computer aided manufacturing; Context; Costs; Random access memory; Routing; Table lookup; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

INFOCOM '91. Proceedings. Tenth Annual Joint Conference of the IEEE Computer and Communications Societies. Networking in the 90s., IEEE

Conference_Location

Bal Harbour, FL

Print_ISBN

0-87942-694-2

Type

conf

DOI

10.1109/INFCOM.1991.147548

Filename

147548