DocumentCode
3553023
Title
Optimization of MNOS device performance
Author
Ross, E.C. ; Duffy, M.T. ; Goodman, A.M.
Author_Institution
RCA Laboratories, Princeton, N. J.
Volume
15
fYear
1969
fDate
1969
Firstpage
46
Lastpage
46
Abstract
The MNOS (metal-nitride-oxide-semiconductor) memory transistor is similar in geometry and fabrication technique to standard MOS (metal-oxide-semiconductor) devices, except for the gate insulator, which is a two layer structure of silicon dioxide nearest the silicon and silicon nitride on top of the silicon dioxide. Donor-type defect states, or traps, exist at or near the interface between these two insulators, and the states may be charged and discharged by the application of electric fields to the insulators. The amount of charge in the traps influences the surface potential of the silicon, and can therefore be used to alter the threshold voltage of a transistor fabricated with this double insulator structure.
Keywords
Dielectrics and electrical insulation; FETs; Image storage; Lighting; Metal-insulator structures; Optical arrays; Silicon compounds; Space charge; Threshold voltage; Writing;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices Meeting, 1969 International
Type
conf
DOI
10.1109/IEDM.1969.188107
Filename
1475988
Link To Document