Abstract :
A PNPN latch is an attractive solution for incorporating memory functions in solid state displays, since it consumes power only in the "on" condition. Light-emitting diodes, incorporated into a four-layer PNPN latch, so that the memory and light-emitting device are an integral part of the same structure had been proposed (1). Recent work (2) resulted in a numeric display using a hybrid assembly of GaAsxP1-xlight-emitting diode (LED) sources and silicon monolithic I. C.\´s are drivers. This paper deals with design of a array of latch type of memory elements for use with GaAsxP1-xLED\´s fabricated in silicon monolithic I.C. form.
