DocumentCode
3553102
Title
The MOS planox process
Author
Morandi, F.
Author_Institution
R&D Laboratories, S.G.S., S.p.A., Milan, Italy.
Volume
15
fYear
1969
fDate
1969
Firstpage
126
Lastpage
126
Abstract
In MOS integrated circuits, active areas are distinguished from inactive areas by the difference in threshold voltage. This difference is usually achieved by using vastly different oxide thicknesses in the respective areas. A result of this practice is that: (a) photoengraving of thick oxide is necessary; (b) the surface of the wafer presents large steps in the oxide (1.5 µ typical). Where metallization runs across these steps weak spots can occur unless the shape of the step is carefully controlled or very thick metal used.
Keywords
Aluminum; Conductivity; Dielectrics; Etching; MOS integrated circuits; MOSFETs; Metallization; Oxidation; Shape control; Silicon;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices Meeting, 1969 International
Type
conf
DOI
10.1109/IEDM.1969.188179
Filename
1476060
Link To Document