Title :
Advantages of vapor-plated phosphosilicate films in large-scale integrated circuit arrays
Author :
Schlacter, M. ; Keen, E.S.R. ; Lathlaen, R. ; Schnable, G.L.
Author_Institution :
Philco-Ford Microelectronics Division, Blue Bell, Pa.
Abstract :
The yield and reliability of silicon integrated circuits are significantly increased by the application of a chemical vapor deposited phosphosilicate layer after first level metallization. These benefits are directly attributable to the physical and electronic properties of phosphosilicate films. A number of limitations of planar silicon devices, such as susceptibility of the metallization to scratches or corrosion effects, and the possibility of surface-related instability due to ion migration effects are overcome by this process. In multilevel metallized large-scale integrated circuit arrays, deposited phosphosilicate films are a very satisfactory dielectric between metal layers, providing the capability of reliable, low-resistance interconnections. Used as either passive films on single-scale metallized devices, or as the second dielectric layer in multilevel metallized devices, chemical vapor deposited phosphosilicate films have been found to possess a number of significant advantages compared to silicon dioxide films deposited from silane under similar conditions. Results of a comprehensive study of the properties of bipolar and MOS devices of various degrees of complexity, coated with phosphosilicate films, will be presented.
Keywords :
Application specific integrated circuits; Chemicals; Corrosion; Dielectrics; Integrated circuit metallization; Integrated circuit reliability; Integrated circuit yield; Large scale integration; Semiconductor films; Silicon devices;
Conference_Titel :
Electron Devices Meeting, 1969 International
DOI :
10.1109/IEDM.1969.188182