Performance limits of bucket-brigade shift registers

Studies of integrated IGFET bucket-brigade charge-transfer shift registers show that charge-transfer efficiency depends on IGFET output conductance, on magnitude of the transferred charge, and on clock voltage waveforms. In a 64-device register, charge-transfer efficiency of 99.8% per stage has been achieved at 1 MHz with a structure that minimizes IGFET output conductance. An important operating constraint is that the register must always carry a small circulating charge, otherwise charge transfer efficiency is greatly impaired.