• DocumentCode
    3553253
  • Title

    Silicon gate CMOS integrated circuits

  • Author

    Burgess, R.R. ; Daniels, R.G.

  • Author_Institution
    Motorola, Phoenix, Ariz.
  • Volume
    16
  • fYear
    1970
  • fDate
    1970
  • Firstpage
    112
  • Lastpage
    112
  • Abstract
    The major advantages offered by silicon-gate CMOS technology have been applied to the fabrication of monolithic integrated circuits for micropower applications. Complementary n- and p-channel enhancement-mode devices fabricated with silicon gate in conjunction with a unique substrate preparation tech, nique have exhibited threshold voltages of 0.5 ± 0.2V. Drain-to-source leakage currents, as well as pot to substrate leakage current, are typically less than 1 nA at 3 V.
  • Keywords
    CMOS integrated circuits; CMOS technology; Dielectric substrates; Energy consumption; Fabrication; Leakage current; MOS capacitors; Metallization; Silicon; Threshold voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electron Devices Meeting, 1970 International
  • Type

    conf

  • DOI
    10.1109/IEDM.1970.188300
  • Filename
    1476412