Dilated multistage interconnection networks for fast packet switching

Author

Bushnell, Eric T. ; Meditch, James S.

Author_Institution

Dept. of Electr. Eng., Washington Univ., Seattle, WA, USA

fYear

1991

fDate

7-11 Apr 1991

Firstpage

1264

Abstract

Dilated multistage interconnection network (MIN) architectures are examined, which are characterized by multiple physical links for every logical link within the network. Their performance in a packet-switching environment is studied. The multitude of links in a dilated MIN increase throughput and capacity, offer versatility in switch configuration, and provide a ready foundation for fault-tolerant switch design. Two new configurations are introduced: a dilated extra-stage cube and a cross-connected replicated-dilated network. The latter architecture is a convenient one for single-board, modular design of larger packet switches

Keywords

multiprocessor interconnection networks; packet switching; switching networks; MIN; capacity; cross-connected replicated-dilated network; dilated extra-stage cube; fast packet switching; fault-tolerant switch design; logical link; multiple physical links; multistage interconnection network; throughput; Circuits; Fault tolerance; Multiprocessor interconnection networks; Optical packet switching; Packet switching; Routing; Switches; Telecommunication traffic; Throughput; Traffic control;

fLanguage

English

Publisher

ieee

Conference_Titel

INFOCOM '91. Proceedings. Tenth Annual Joint Conference of the IEEE Computer and Communications Societies. Networking in the 90s., IEEE

Conference_Location

Bal Harbour, FL

Print_ISBN

0-87942-694-2

Type

conf

DOI

10.1109/INFCOM.1991.147649

Filename

147649