DocumentCode
3553304
Title
Parameterized schematics (VLSI)
Author
Barth, Richard ; Serlet, Bertrand ; Sindhu, Pradeep
Author_Institution
Xerox PARC Comput. Sci. Lab., Palo Alto, CA, USA
fYear
1988
fDate
12-15 June 1988
Firstpage
243
Lastpage
249
Abstract
A design capture system is presented that allows parameterized schematics and code to be intermixed freely to produce annotated net lists. A key feature of the system is its extensibility. It provides a small set of powerful abstractions for design description that can easily be extended by users. The system also allows convenient graphical specification of layout generators, and has been used to produce several large VLSI chips.<>
Keywords
VLSI; circuit CAD; circuit layout CAD; integrated circuit technology; VLSI chips; annotated net lists; design capture system; graphical specification; layout generators; parameterized schematics; Capacitance; Computer languages; Computer science; Control systems; Graphics; Hardware design languages; Laboratories; Layout; Programming environments; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 1988. Proceedings., 25th ACM/IEEE
Conference_Location
Anaheim, CA, USA
ISSN
0738-100X
Print_ISBN
0-8186-0864-1
Type
conf
DOI
10.1109/DAC.1988.14765
Filename
14765
Link To Document