DocumentCode
3553325
Title
Pre-aligned gate MOS devices using doped polycrystalline silicon technology
Author
Maeda, Kumiko ; Shirai, Keigo
Volume
17
fYear
1971
fDate
1971
Firstpage
44
Lastpage
46
Abstract
Recently, various technologies have been developed to attain a high reliability, large scale integration and improvements of characteristics in the field of MOS devices. This paper describes a new technique for fabricating a self-aligned, area-reduced and stable MOS structure which has not been obtained under conventional method.
Keywords
Absorption; Etching; Heat treatment; Insulation; Ionizing radiation; MOS devices; Semiconductor films; Silicon; Thermal stresses; Vacuum technology;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices Meeting, 1971 International
Type
conf
DOI
10.1109/IEDM.1971.188369
Filename
1476707
Link To Document