DocumentCode
3553376
Title
Development of an ECL gate with a 300 ps propagation delay
Author
Eckton, W.H., Jr. ; O´Shea, T.E.
Volume
17
fYear
1971
fDate
1971
Firstpage
100
Lastpage
100
Abstract
A beam-lead sealed-junction silicon air-isolated-monolithic (AIM) ECL logic gate is described which has propagation delays of as little as 250 picoseconds. The basic building block of the circuit is a 6 GHz silicon microwave transistor with an fmax of 10 GHz. The transistors have 2.5 micron stripes and 2.5 micron spacings with a base width of 0.15 to 0.2 micron. Computer simulations of several popular isolation techniques show that the minimization of parasitics achieved with the AIM technology is necessary to achieve these speeds. The analytically predicted characteristics include a dc transfer slope of 5.1 and the following propagation delays: NOR turn-on: 300 ps, NOR turn-off: 250 ps, OR turn-on: 300ps, and OR turn-off: 410 ps. The differences in the propagation delays are caused by current-source modulation.
Keywords
Computer simulation; Integrated circuit measurements; Isolation technology; Laboratories; Logic gates; Microwave circuits; Microwave transistors; Minimization; Propagation delay; Silicon;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices Meeting, 1971 International
Type
conf
DOI
10.1109/IEDM.1971.188416
Filename
1476754
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