A novel mode of write operation utilizing avalanche-tunnel injection in MNOS memory transistor

This paper describes a new mode of operation for a non-volatile read write random access memory, where a p-channel MNOS transistor is biased in a way different from the well-accepted direct tunneling mode of operation. The drain and source electrodes of the transistor are connected t9 the negative pulse voltage supply, while the gate and substrate are grounded. Hot electron injections into the insulator takes place from the avalanche plasma when the applied voltage exceeds the breakdown voltage of the drain and source junctions as in the case of FAMOS. Besides the simple avalanche injection, hot electron tunneling also takes place near the drain and source junctions and at the same time the electric field normal to the surface of the gate region under the avalanche breakdown condition causes the direct tunneling.