Optimum design of power transistor switches

An optimization procedure is developed which completely specifies the one-dimensional design of a double-diffused transistor with only two pieces of input data required: the collector-emitter sustaining voltage and the current gain required when the device is operating in the region of quasi saturation. A simple but experimentally validated model for predicting hBEVS. Icis also developed and used in the optimization procedure. The analysis is intended to apply mainly to the case of high-voltage, high-current switching transistors which have a lightly doped collector.