Title :
A gate array implementation of a fault-tolerant bus interface unit based on NuBus protocols
Author :
Tront, Joseph G. ; Tsai, Kuo-yeang
Author_Institution :
Dept. of Electr. Eng., Virginia Polytech. Inst. & State Univ., Blacksburg, VA, USA
Abstract :
A gate array fault-tolerant bus-interface IC based on modified NuBus protocols is described. The gate array IC design system HIGHLAND is used, along with other CAD (computer-aided design) tools such as the Berkeley VLSI Tool Set and LOGEN, to generate a layout for the bus interface unit. Two programs are written to interface the necessary CAD tools. All the circuits are designed and simulated on a VAXstation 3200 (Ultrix-32) and VAX11/785 (VMS)
Keywords :
circuit layout CAD; computer interfaces; fault tolerant computing; logic CAD; logic arrays; protocols; Berkeley VLSI Tool Set; CAD; HIGHLAND; IC design system; LOGEN; NuBus protocols; Ultrix-32; VAX11/785; VAXstation 3200; VMS; computer-aided design; fault-tolerant bus; gate array implementation; interface unit; layout; logic design; Circuits; Control systems; Costs; Design automation; Fault tolerance; Microprocessors; Multiprocessing systems; Packaging; Protocols; Very large scale integration;
Conference_Titel :
Southeastcon '91., IEEE Proceedings of
Conference_Location :
Williamsburg, VA
Print_ISBN :
0-7803-0033-5
DOI :
10.1109/SECON.1991.147717
