Space-charge-limited transistors in switching circuits

Lateral complementary pairs of SCL transistors have been fabricated on high resistivity substrates with three masking steps including metallization. Both NPN and PNP transistors exhibit a very high current gain in the microampere current region. The complementary pairs were operated as inverters at a power level as low as 6µW with a power supply voltage of 0.6V. The delay times per stage with 0.6 and 0.9V supply voltages were 80 and 50ns, respectively, with a 2pf load. Complementary flip-flops of SCL transistors require only a 0.3 7V supply voltage with a standby power of 35nW. The complementary pairs have very low capacitances. The ft´s of the complementary pair are about 700 MHz in the micro-ampere current region. The device and wiring capacitances can be further reduced to about 1% of the conventional bipolar capacitance.