A high-speed p-channel random access 1024-bit memory made with electron lithography

A switched capacitor, p-channel, 1024-- bit random access memory has been made with electron lithography. The circuit was the same as that described by Boll and Lynch (IEDM, 1972) but with halved lateral dimensions. For a given cell the gate length of the switching transistor was 4µm, and the chip size was 1.2×1.8mm. In order to fabricate the device, a 1µm alignment accuracy was required. Even with the modest shrinking of feature size, the minimum access time of the memory was reduced to less than 50 ns.