Title :
Global routing techniques for an automatic mixed analog/digital IC layout compiler
Author_Institution :
Dept. of Electr. Eng., Maryland Univ., College Park, MD, USA
Abstract :
Global routing techniques for an automated analog/digital IC layout compiler are presented. The global router routes in a net-by-net, high-sensitivity-net-first order. Minimum trees are searched for the interconnection of sensitive nets and power nets. For the routing of noise nets, the router provides a net-crossing-free terminal assignment between sensitive nets and noise nets for the routing of channels. Efficient terminal assignment and extraction techniques for the router are also presented
Keywords :
application specific integrated circuits; circuit layout CAD; trees (mathematics); automated analog/digital IC layout compiler; extraction techniques; global routing techniques; minimum trees; net-crossing-free terminal assignment; noise nets; power nets; sensitive nets; terminal assignment; Analog circuits; Analog integrated circuits; Coupling circuits; Data mining; Digital integrated circuits; Educational institutions; Integrated circuit interconnections; Integrated circuit layout; Integrated circuit noise; Routing;
Conference_Titel :
Southeastcon '91., IEEE Proceedings of
Conference_Location :
Williamsburg, VA
Print_ISBN :
0-7803-0033-5
DOI :
10.1109/SECON.1991.147780
