A model for short-channel IGFETs

Summary form only given, as follows. The speed and packing density of circuits can be increased by the use of small devices such as FETs. !n analyzing a circuit that incorporates small FET devices, the engineer needs to describe the inherent short-channel effects. Also, the greater speed and packing density increase the need for accuracy in the statistical descriptions of both devices and circuits. In this work a model to describe short-channel effects, as well as process-induced device statistics and temperature effects, is given. The model includes an expression for the current of an IGFET, taking into account the dependence of mobility on the electric field; appropriate corrections are made for channel doping and temperature. To describe the saturation current, an approximation to a quasi-two-dimensional Poisson solution is applied to the pinch-off region. The saturation current-voltage characteristic is matched to that of the triode, with continuity maintained in the first derivative. By using the charge control approach and accounting for the gate charge and the channel charge, the gate-source and gate-drain capacitances that exist with the device on are derived as a function of the gate-source and gate-drain potentials. The gatesubstrate capacitance is introduced with the device off. The expressions in the model are given in terms of the thickness and charge of the gate oxide; the length, width, and doping of the channel; and a variety of geometrical factors for calculating the overlap capacitance. By using this model with ASTAP, computations for statistical analysis can be made readily by introducing variations in relevant parameters.