Title :
A model for design of the integrated injection logic unit
Author :
Hewlett, F.W., Jr.
Author_Institution :
Bell Telephone Laboratories, Inc., Allentown, Pa.
Abstract :
Summary form only given, as follows. Integrated Injection Logic (I2L) utilizes merged multi-collector complimentary bipolar transistors to obtain high functional density (100 gates/min2) and power delay efficiency (l.0 pJ). A model. after Ebers and Moll, which describes the interaction between the merged complimentary transistors is presented. The model parameters are related to measurable parameters which are expressed in terms of device morphology providing design insight. The current gain β is expressed in terms of the intrinsic NPN gain βI and a loss factor Λ, as β = βI(1 - βI* Λ). β = βI for the zero loss case (Λ = 0) and decreases as Λ increases approaching 1/(Λ) for βI* >> 1.0. The dependence of Λ on the PNP and NPN collector areas and integrated base dopants is established enabling the design of a logic unit which meets the requirement β is greater than or equal to 1.0 for logical operation insensitive to processing variations.
Keywords :
Bipolar transistors; Logic design; Logic devices; Solid state circuits;
Conference_Titel :
Electron Devices Meeting (IEDM), 1974 International
Conference_Location :
Washington, DC
DOI :
10.1109/IEDM.1974.188807