Multilevel random access memory using one JFET per cell

A memory cell capable of storing multilevel or analog information and providing random-access operation with nondestructive readout has been studied. It used a single junction field-effect transistor as the storage cell. Experimental and analytical studies suggest that eight or sixteen level operation should be feasible with refresh operations every 0.1 to 1 second; cell area can be under 2 mil².