DocumentCode
3554069
Title
Gold diffusion transistor logic: A new LSI Gate family
Author
Takagaki, Takashi ; Mukogaw, Masashi
Author_Institution
Nippon Electric Company, Limited, Nakaharaku Kawasaki, Japan
Volume
21
fYear
1975
fDate
1975
Firstpage
559
Lastpage
562
Abstract
Gold diffusion transistor logic (GTL) has been defined and fabricated as it will be useful for both high speed and low power bipolar LSI logic circuits. GTL is composed of nearly intrinsic high resistor and n-p-n transistors with conventional gold diffusion. Each component of GTL is self isolated with the foregoing gold diffusion without any special isolation. Speed-power products of 1.5 pJ per gate have been measured in 4-bit arithmetic logic unit (ALU) and packing densities of 150 gates/mm2have been achieved. A performance comparison with integrated injection logic (IIL) will be presented.
Keywords
Atomic layer deposition; Bipolar transistor circuits; Conductivity; Gold; Inverters; Large scale integration; Logic circuits; Resistors; Silicon; Solids;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices Meeting, 1975 International
Type
conf
DOI
10.1109/IEDM.1975.188947
Filename
1478308
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