DocumentCode
3554162
Title
Endurance of thin-oxide nonvolatile MNOS memory transistors
Author
White, Marvin H. ; Dzimianski, John W. ; Peckerar, Martin C.
Author_Institution
Westinghouse Electric Corporation, Baltimore, Maryland
Volume
22
fYear
1976
fDate
1976
Firstpage
177
Lastpage
180
Abstract
A discussion of the factors which determine the endurance of thin-oxide MNOS Memory Transistors. Si-SiO2 Interface States are influential in the early stages of erase/write cycling, while charge movement into the nitride controls the long term cycling characteristics. The preparation of the thin-oxide region, its composition, dielectric properties and thickness; a high density of spatially localized traps near the nitride/oxide interface; a low conductivity Si3 N4 dielectric; and optimized electric field strengths permit MNOS Memory Transistors to be operated with high endurance, reliably to beyond 1010erase/write cycles with ± 20v, 100µsec pulses and demonstrate a minimum 2v memory window at 6 months retention time.
Keywords
Acceleration; Current density; Dielectrics; Equations; Interface states; Laboratories; Nonvolatile memory; Transistors; Tunneling; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices Meeting, 1976 International
Type
conf
DOI
10.1109/IEDM.1976.189012
Filename
1478724
Link To Document