DocumentCode :
3554345
Title :
High packing linear integrated circuits using planar metallization with polymer
Author :
Mukai, Kiichiro ; Saiki, Atsushi ; Harada, Seiki ; Shoji, Senji
Author_Institution :
Hitachi, LTD., Tokyo, Japan
Volume :
23
fYear :
1977
fDate :
1977
Firstpage :
16
Lastpage :
19
Abstract :
A linear IC for the TV chroma systems has been packed on a 2.34×2.36mm2chip using a two-level interconnection with Planar Metallization with Polymer (PMP) technology, and is packaged by plastic direct molding. The chip area of this device is reduced about 40% as compared to the conventional device with the sam function. Advanced PMF technique makes it possible to realize this linear IC with high yields and high reliability. In this technique; (1) Purified PIQ (a high heat resisting polyimide, Na 0.5ppm) is used for insulating layers. (2) A special solution of hydrazine-hydrate has been developed to etch the PIQ layer to form via-holes down to 3×3µm. Yield of via-hole contact proved to be over 99.9998%. (3) PMP makes it possible to place the pads for thermo-compression bonding on the active region of the device. (4) Pinhole density of the PIQ layer is less than 0.05/cm2. Failure of interconnection has not been observed in the reliability test.
Keywords :
Analog integrated circuits; Insulation; Integrated circuit interconnections; Integrated circuit metallization; Integrated circuit technology; Plastic integrated circuit packaging; Polyimides; Polymers; Portable media players; TV;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electron Devices Meeting, 1977 International
Type :
conf
DOI :
10.1109/IEDM.1977.189146
Filename :
1479226
Link To Document :
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