Device characteristics for poly I2L

Maximizing I²L speed and efficiency while retaining linear-circuit (LIC) compatibility has received little attention; such is the specific goal of Poly I²L [1]. This paper describes the interaction of the Poly NPN and PNP devices with the compatible 15 to 30 volt LIC NPN and lateral PNP devices, and provides processing details. Experimental data is presented demonstrating the non-critical nature of the Poly I²L out-diffused NPN-base scheme. Minimum propagation delay analysis is done showing good agreement with experimental data. Comparable contributions to the ∼5 nsec delay arise from the NPN and the PNP devices, even for ∼7.5 µm PNP base (10 µm layout basewidth). Extrinsic efficiency is dominated by a peripheral component of base-emitter capacitance. The figure of merit [LIC BVCBO/I²L τmin] is defined and compared for standard and Poly I²L. Finally, it is shown that the previously recognized upper limit on epitaxial resistivity for I²L DC operation does not apply to Poly I²L.