DocumentCode
3554437
Title
The buried-source VMOS dynamic RAM device
Author
Barnes, J.J. ; Shabde, S.N. ; Jenne, F.B.
Author_Institution
American Microsystems, Inc., Santa Clara, CA
Volume
23
fYear
1977
fDate
1977
Firstpage
272
Lastpage
276
Abstract
The buried-source dynamic RAM device combines VMOS technology with the 1-transistor cell for a high performance and high density memory (1). This paper presents results of both experimental and theoretical analyses of the device as they apply to use in a 16K or 64K-bit dynamic RAM. The VMOST threshold voltage, breakdown voltage, weak inversion current, junction leakage current, and junction capacitance for both the forward and reverse mode of operation (reversal of source and drain) are experimentally related to the shape of the doping profile throughout the channel. Equations are developed for the VMOST short-channel threshold voltage and storage capacity of the cell. Finally, cell refresh data is presented that proves the operation of the device as a dynamic memory element.
Keywords
Boron; Breakdown voltage; Capacitance; DRAM chips; Electric breakdown; Epitaxial growth; Random access memory; Substrates; Threshold voltage; Voltage control;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices Meeting, 1977 International
Type
conf
DOI
10.1109/IEDM.1977.189230
Filename
1479310
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