DocumentCode
3554438
Title
Fabrication and characterization of a VMOS EPROM
Author
Draper, D.A. ; Barnes, J.J. ; Jenne, F.B.
Author_Institution
American Microsystems, Inc., Santa Clara, California
Volume
23
fYear
1977
fDate
1977
Firstpage
277
Lastpage
283
Abstract
This paper presents experimental results for the performance of the VMOS EPROM device. The fabrication of the device is presented, followed by data for programmability and data retention. The device programs with lower applied voltages than other EPROM devices, and its projected data retention characteristic predicts a threshold drop of less than 1 volt in 40 years at 150°C junction temperature. EPROM device modeling for use in circuit simulation is also presented. Methods to calculate the capacitors associated with the device are shown for the VMOS geometry, and it is shown that no weak-inversion current exists due to drain coupling.
Keywords
Boron; EPROM; Electrons; Epitaxial layers; Fabrication; Geometry; Nonvolatile memory; Silicon; Substrates; Threshold voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices Meeting, 1977 International
Type
conf
DOI
10.1109/IEDM.1977.189231
Filename
1479311
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