Four-transistor static CMOS memory cells

A new approach toward size reduction of low-power static memory cells, based on ion-implanted leaky diodes in CMOS circuits, is described. The leaky diodes act as trickle chargers counteracting normal diode leakage currents and can be used in four different cells: a one-sided cell, a two-sided cell, and their complements. The reverse conductance of the implanted diodes must be greater than that of a normal diode of opposite type, but smaller than that of a transistor. The conductance range which allows static operation is thus quite broad. Results of leakage studies for various damage implantation schedules are shown, indicating that the peripheral contribution to leakage dominates and that the leakage activation energy in an implanted device is roughly half that of an ordinary diode. These considerations, along with static power constraints, lead to a realizable range of viable enhanced leakage levels. Since leaky diodes are constructed under contact openings to diffusions, they consume no additional area in the cell. Circuit design aspects of the cell variations are discussed.