DocumentCode
3554647
Title
Radiation-tolerant high-voltage CMOS/MNOS technology
Author
Derbenwick, G.F. ; Black, W.C., Jr.
Author_Institution
Sandia Laboratories, Albuquerque, NM
Volume
24
fYear
1978
fDate
1978
Firstpage
226
Lastpage
229
Abstract
A radiation-tolerant metal-gate CMOS technology has been developed for use on non-volatile MNOS integrated circuit chips. CMOS peripherals fabricated with this process are capable of the high voltage operation (> 25 V) required to drive the memory array and require only the standard seven mask levels, including passivation. One additional mask is required to define the MNOS memory devices. Fabrication and characterization of these circuits is described. Processing sequences compatible with known radiation hardening procedures have been defined.
Keywords
CMOS integrated circuits; CMOS memory circuits; CMOS process; CMOS technology; Fabrication; Integrated circuit technology; Nonvolatile memory; Passivation; Radiation hardening; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices Meeting, 1978 International
Type
conf
DOI
10.1109/IEDM.1978.189393
Filename
1479818
Link To Document