Title :
A punch-through isolated dynamic RAM cell
Author :
Taylor, G.W. ; Chatterjee, P.K. ; Fu, H.S. ; Tasch, A.F.
Author_Institution :
Texas Instruments Incorporated, Dallas, Texas
Abstract :
A novel dynamic RAM Cell concept is introduced. The operation, charge storage mechanism and layout of the cell are similar in essence to the VMOS RAM Cell [1]. The novelty is in the use of a punch-through mechanism to address the cell. This results in a planar cell which may be fabricated using regular NMOS technology. The cell structure has the potential for very high density, low leakage and charge capacity comparable to the normal one-transistor cell. Measurements on the cell are compared with those on a one-transistor cell.
Keywords :
Circuits; DRAM chips; Dynamic voltage scaling; Geometry; Instruments; Laboratories; Leakage current; MOS devices; Read-write memory; Threshold voltage;
Conference_Titel :
Electron Devices Meeting, 1978 International
DOI :
10.1109/IEDM.1978.189426
