DocumentCode :
3554813
Title :
HERCULES-a system for high-level synthesis
Author :
De Micheli, Giovanni ; Ku, David C.
Author_Institution :
Comput. Syst. Lab., Stanford Univ., CA, USA
fYear :
1988
fDate :
12-15 June 1988
Firstpage :
483
Lastpage :
488
Abstract :
An approach is presented to high-level synthesis of VLSI processors and systems. Synthesis consists of two phases: behavioral synthesis, which involves implementation-independent representations: and structural synthesis which relates to the transformation of a behavior into an implementation. The authors describe the HERCULES system and address the hardware description problem, behavioral synthesis, optimization using a method called the reference stack and the mapping of behavior onto a structure. They present a model for control based on sequencing graphs that supports multiple threads of execution flow, allowing varying degrees of parallelism in the resulting hardware. Results are presented for three examples: the MC 6502, Intel 8251, and FRISC, a 16-bit microprocessor.<>
Keywords :
VLSI; circuit CAD; logic CAD; microprocessor chips; 16-bit microprocessor; CAD; FRISC; HERCULES; Intel 8251; MC 6502; VLSI processors; VLSI systems; behavioral synthesis; hardware description problem; high-level synthesis; implementation-independent representations; optimization; reference stack; sequencing graphs; structural synthesis; Automatic control; Delay; Design automation; Hardware; High level synthesis; Logic circuits; Logic design;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference, 1988. Proceedings., 25th ACM/IEEE
Conference_Location :
Anaheim, CA, USA
ISSN :
0738-100X
Print_ISBN :
0-8186-0864-1
Type :
conf
DOI :
10.1109/DAC.1988.14803
Filename :
14803
Link To Document :
بازگشت