DocumentCode
3554929
Title
An advanced PSA process for high speed bipolar VLSI
Author
Ishida, I. ; Aomura, K. ; Nakamura, T.
Author_Institution
NEC-TOSHIBA Info. Sys., Inc., Kanagawa, Japan
Volume
25
fYear
1979
fDate
1979
Firstpage
336
Lastpage
339
Abstract
A structure, fabrication processes and performances of the bipolar transistor with 1 µm wide emitter are presented. An advanced polysilicon self-aligned (APSA) technology (1) is applied in order to realize high speed bipolar VLSI. The remarkable feature of the APSA technology is its overlapping structure of emitter electrodes using the second layer of polysilicon. Consequently, 1 µm wide emitter and a spacing of about 1 µm between the edges of the emitter diffused layer and the base contact windows can be realized at a time. Further, the shallow base junction can be controlled arbitrarily because intrinsic base is fabricated just before forming emitter. By using the APSA technology, we have realized low power CML (LCML) structure with 1×3 µm2emitter transsistors leading to the maximum propagation delay time of 0.29 ns/gate and a speed power product of 0.18 pJ/gate in low current region.
Keywords
Bipolar transistors; Capacitance; Electrodes; Fabrication; Laboratories; Power dissipation; Propagation delay; Resistors; Silicon; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices Meeting, 1979 Internationa
Type
conf
DOI
10.1109/IEDM.1979.189618
Filename
1480483
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