DocumentCode :
3554938
Title :
A 1 µm Mo-gate 64-Kbit MOS RAM
Author :
Yanagawa, F. ; Kiuchi, K. ; Hosoya, T. ; Tsuchiya, T. ; Amazawa, T. ; Mano, T.
Author_Institution :
NTT, Tokyo, Japan
fYear :
1979
fDate :
3-5 Dec. 1979
Firstpage :
362
Lastpage :
365
Abstract :
New double-layer technology using molybdenum and polysilicon gate(Mo-poly technology) is proposed. Molybdenum and polysilicon were used for word lines and gates of storage capacitors, respectively. The propagation delay in a word line becomes extremely small and cell size is reduced to 8 µm × 8 µm. A 64-Kbit MOS RAM, designed by Mo-poly technology, was experimentally fabricated by 1 µm process technologies.
Keywords :
Annealing; Conductivity; Design optimization; Fabrication; MOSFETs; Power supplies; Propagation delay; Read-write memory; Subthreshold current; Threshold voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electron Devices Meeting, 1979 Internationa
Conference_Location :
Washington, DC, USA
Type :
conf
DOI :
10.1109/IEDM.1979.189626
Filename :
1480491
Link To Document :
بازگشت