Planar high yield GaAs IC processing techniques

A rapidly developing planar, GaAs LSI fabrication technology has been successfully demonstrated at the MSI (∼60-100 gates) level. Extension of the current MSI technology to the LSI/VLSI domain will depend critically on the yield of the GaAs material and fabrication processes used. The purpose of this paper is to describe a planar GaAs IC process which combines unique planar device structures with a number of LSI compatible high yield processes including ion implantation, photolithography, plasma etching, and ion milling.