DocumentCode
3555052
Title
Incremental-in-time algorithm for digital simulation
Author
Choi, Kiyoung ; Hwang, Sun Young ; Blank, Tom
Author_Institution
Stanford Univ., CA, USA
fYear
1988
fDate
12-15 Jun 1988
Firstpage
501
Lastpage
505
Abstract
The authors present an incremental-in-time algorithm for incremental simulation of digital circuits. In contrast to the incremental-in-space algorithm, which pessimistically resimulates the circuit components that could be affected by design changes throughout the simulation time frames, the incremental-in-time algorithm resimulates a circuit component only for the simulation time frames when its inputs or internal state variable make different state transitions from the previous simulation run. It maximally utilizes the past history, thereby reducing the number of component evaluations to a minimum. Experimental results obtained for several practical circuits show speedups up to 30 times faster than conventional event-driven stimulation
Keywords
circuit analysis computing; digital circuits; component evaluations; digital circuits; digital simulation; incremental-in-time algorithm; Algorithm design and analysis; Circuit simulation; Digital circuits; Digital simulation; Discrete event simulation; Hardware; History; Logic circuits; Logic design; Sun;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 1988. Proceedings., 25th ACM/IEEE
Conference_Location
Anaheim, CA
ISSN
0738-100X
Print_ISBN
0-8186-0864-1
Type
conf
DOI
10.1109/DAC.1988.14806
Filename
14806
Link To Document