DocumentCode :
3555116
Title :
A new complementary transistor structure for analog integrated circuits
Author :
Kikkawa, Takamaro ; Suganuma, Toru ; Tanaka, Koichi ; Hara, Tomoi
Author_Institution :
Nippon Electric Co., Ltd., Kawasaki City, Japan
Volume :
26
fYear :
1980
fDate :
1980
Firstpage :
65
Lastpage :
68
Abstract :
A new complementary transistor structure has been developed. This paper presents a new technique which provides a fully complementary transistor structure for analog integrated circuits. The pnp transistor is fabricated by triple diffusion process in n type epitaxial layer on p type substrate, and is isolated from the substrate by inserting n- ion implanted layer between p+ collector buried layer and the substrate. This technique results in 5 to 10 times improvement in gain bandwidth product fT, maximum collector current IC(max)and collector saturation voltage VCE(sat)in comparison with conventional pnp transistors. Consequently, a fully complementary pnp transistor to npn transistors can be obtained.
Keywords :
Analog integrated circuits; Diffusion processes; Epitaxial layers; Fabrication; Frequency; Impurities; Ion implantation; Low voltage; Monolithic integrated circuits; Substrates;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electron Devices Meeting, 1980 International
Type :
conf
DOI :
10.1109/IEDM.1980.189754
Filename :
1481197
Link To Document :
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