DocumentCode
3555216
Title
High frequency bipolar - JFET - I2L process
Author
Lui, S.K. ; Meyer, R.G.
Author_Institution
University of California, Berkeley, CA
Volume
26
fYear
1980
fDate
1980
Firstpage
382
Lastpage
385
Abstract
A new monolithic process is described which allows simultaneous fabrication of high-speed (fT =400 MHz) JFETs, high-frequency (fT =4 GHz) bi-polar transistors plus I2L logic (td =14 ns). The process incorporates an ion-implanted JFET structure with independently contacted gates and a bi-polar transistor with implanted base and emitter.
Keywords
Bipolar transistors; Capacitance; Fabrication; Frequency estimation; Implants; Integrated circuit reliability; Integrated circuit technology; JFET circuits; Laboratories; Logic;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices Meeting, 1980 International
Type
conf
DOI
10.1109/IEDM.1980.189844
Filename
1481287
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