DocumentCode :
3555217
Title :
Multi-collector ECL circuit family and its application to 1 GHz prescaler IC
Author :
Shimizu, Shoichi ; Komatsu, Shigeru ; Torii, Ken-ichi
Author_Institution :
Toshiba Research & Development Center
Volume :
26
fYear :
1980
fDate :
1980
Firstpage :
386
Lastpage :
389
Abstract :
This paper describes a newly proposed Emitter Coupled Logic (ECL) circuit family named Collector Function Logic (CFL). The configuration saves chip area without performance degradation. A divide-by-256, 1 GHz prescaler IC has been developed as an application of the CFL configuration. Two hundred forty mW power consumption (at Vcc= 5V) r 1.2 GHz toggle frequency and a 1.11 × 1.30mm chip arear which is smaller by about 30 % in comparison with a conventional ECL structures are achieved by this IC.
Keywords :
Application specific integrated circuits; Coupling circuits; Degradation; Energy consumption; Flip-flops; Frequency; Logic circuits; Master-slave; Power engineering and energy; Switching circuits;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electron Devices Meeting, 1980 International
Type :
conf
DOI :
10.1109/IEDM.1980.189845
Filename :
1481288
Link To Document :
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