Increased charge capacity in Hg1-xCdxTe MIS devices using a ramped gate voltage

The useful charge capacity of an MIS device can be increased by utilizing a ramped gate voltage mode of operation. The gate voltage is ramped to increase the MIS well capacity at a rate slightly faster than the rate of charge build-up in the inversion layer. In this manner the electric field in the depletion region is kept below the breakdown threshold. The ramping technique is demonstrated on mid (3-5 µn) and long (8-10 µm) cutoff wavelength HgCdTe MIS devices operating at 80K in the presence of IR background radiation. Factors of greater than ten improvement in usable charge capacity and integration time are reported. The ramping concept is successfully implemented in an 8×12 time-delay-and-integrate (TDI) CCD design.