Twin-tub CMOS - A technology for VLSI circuits

CMOS technology has been developed through several generations of design rules with an n-type substrate (where p-channel transistors were formed) and with a p-tub implanted and diffused region (where n-channel transistors were formed). In order to enable a separate optimization of both transistors and to utilize the dopant control available with implanted layers, a two-tub approach was adopted. Utilizing lightly doped epi on an n⁺substrate (for latch-up protection), nitride-masked self-aligned tubs, 10¹⁶cm^-3surface doping and 600Å gate oxides, an 8-mask CMOS process (named \´Twin-Tub") was formulated. The combination of n on n⁺epi and careful I/O layout renders the circuits latch-up free. Novel aspects of the process, the devices it produces and finally the resultant circuit performance are herein described.