DocumentCode
3555333
Title
New edge-defined vertical-etch approaches for submicrometer MOSFET fabrication
Author
Hunter, W.R. ; Holloway, T.C. ; Chatterjee, P.K. ; Tasch, A.F., Jr.
Author_Institution
Texas Instruments Incorporated, Dallas, Texas
Volume
26
fYear
1980
fDate
1980
Firstpage
764
Lastpage
767
Abstract
This paper describes a new, convenient "undercut and backfill" technique for forming edge-defined submicrometer elements based only on standard optical lithography and vertical (anisotropic) dry etching. MOSFETs having physical channel lengths from
m to
m can be fabricated using this approach, This method is compared with an alternative vertical etch, edge-defined technique which is capable of fabricating physical gate lengths oF
m. In particular, MOSFETs having
m, believed to be the smallest reported to date, have been made. A vertical etching technique which forms a passivating sidewall oxide is also described. Modifications of this technique to fabricate self-aligned shallow/deep n+/n++ junctions having reduced series resistance and short-channel effects (in particular punchthrough) are illustrated.
m to
m can be fabricated using this approach, This method is compared with an alternative vertical etch, edge-defined technique which is capable of fabricating physical gate lengths oF
m. In particular, MOSFETs having
m, believed to be the smallest reported to date, have been made. A vertical etching technique which forms a passivating sidewall oxide is also described. Modifications of this technique to fabricate self-aligned shallow/deep n+/n++ junctions having reduced series resistance and short-channel effects (in particular punchthrough) are illustrated.Keywords
Anisotropic magnetoresistance; Diodes; Dry etching; Fabrication; Instruments; Laboratories; MESFETs; MOSFET circuits; Plasma applications; Plasma sources;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices Meeting, 1980 International
Type
conf
DOI
10.1109/IEDM.1980.189949
Filename
1481392
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