DocumentCode
3555429
Title
A high performance silicon-on-sapphire electrically erasable PROM
Author
Garrigues, M. ; Hellouin, Y. ; Calzi, P.
Author_Institution
Ecole Centrale de Lyon, Ecully, France
Volume
27
fYear
1981
fDate
1981
Firstpage
32
Lastpage
35
Abstract
We describe a SOS non volatile memory device with fast electrical programming and erasing capability. Quasi-uniform hot electron injection is used for both writing and erasing. The device is based on a pseudo-double-stacked gate structure with a floating SOS substrate. Experimental results are presented for a tentative device made with standard test components. Writing is performed by pulses of + 20 and - 20 V, 100
s. Erasing requires a 1 MHz pulse train of + 22 V, 10 ms. The device operation is modelized using the "lucky electron" model.
s. Erasing requires a 1 MHz pulse train of + 22 V, 10 ms. The device operation is modelized using the "lucky electron" model.Keywords
Breakdown voltage; Charge carrier processes; Iron; MOS capacitors; Nonvolatile memory; PROM; Secondary generated hot electron injection; Substrate hot electron injection; Supercapacitors; Writing;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices Meeting, 1981 International
Type
conf
DOI
10.1109/IEDM.1981.189991
Filename
1481944
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