High gain, wide margin Josephson junction OR and AND gates

A new group of high gain and wide margin Josephson Junction direct coupled isolation devices using a novel amplification scheme is described. The group includes a three Josephson Junction OR (3J/OR) gate and a four Josephson Junction AND (4J/AND) gate. DC threshold curves of both devices have been calculated. The optimized threshold for the 3J/OR shows a 30 percent improvement in margin with respect to that of Direct Coupled Logic (DCL). For the 4J/AND, the gain is improved by a factor of 2 over that of the non-linear current injection interferometer devices and the discrimination between one and two inputs is preserved. Simulations of both the 3J/OR and 4J/AND exhibit approximately square current transfer curves with good input and output isolation. For a fan-in of two and a fan-out of three, the 3J/OR gate gives an average switching delay of 31ps and a power dissipation of 3.6µw, and the 4J/AND gate gives a switching delay of 41ps and a power dissipation of 3.8µw.